The present disclosure relates to a method for reducing lithographic errors for manual processing by automatically removing errors that do not require pattern correction, and a system for effecting the same.
A combination of an optical proximity correction (OPC) program and an optical rule checks (ORC) program is employed to analyze a design layout for a semiconductor chip for lithographic errors. Typically, identification of lithographic errors is performed by running a verification recipe with the OPC program and/or the ORC program. The identified lithographic errors are collected in an error database.
The error base includes errors that ultimately require pattern corrections thereupon and errors that are associated portions of the pattern that can be lithographically printed safely, i.e., without causing yield or reliability issues, despite being identified as errors. The errors that require pattern corrections are referred to as real errors. The errors that are associated portions of the pattern that can be lithographically printed safely are referred to waivers.
A persistent challenge in the verification of any design layout is to identify the waivers among the error database so that efforts to correct the design layout can be concentrated only on real errors. The difficulty of the challenge arises from the complexity of waiver patterns, i.e., the patterns for the waivers. Thus, describing the waivers employing a standard verification language becomes very tedious, and is prone to generating unexpected results. The waiver patterns have a dynamic nature, hence, updating all production verification recipes to waive non-critical patterns can consume many hours of intensive manual examination.